Publicaciones

Samuel Pérez, Darío Suarez, Javier Resano (2024). Accelerating Bayesian Neural Networks on Low-Power Edge RISC-V Processors.

Yamilka Toca-Díaz, Rubén Gran, Alejandro Valero (2024). Flip-and-Patch: A fault-tolerant technique for on-chip memories of CNN accelerators at low supply voltage.

Adrián Alcolea, Javier Resano (2021). GBDT Accelerator.